Seyedeh Masoumeh Navidi
Seyedeh Masoumeh Navidi received her B.Sc. and M.Sc. in Electrical Engineering in 2012 and 2018, respectively, both from the K. N. Toosi University of Technology (KNTU), Tehran, Iran.
As an undergraduate student, her thesis was “Design and implementation of an RFID based automobile production line”. During her Master’s work, she focused on analog and Mixed-Signal circuit design for low power biomedical applications. Her Master thesis was “Design and simulation of a low power 9-bit 1V SAR ADC in 0.18µm CMOS technology”. She is currently pursuing her Ph.D. degree in Wayne State University where her research focus is on Mixed-Signal Circuit Design.
Her research interests include low power analog and Mixed-Signal circuit design, and low power data converters design.
Publications:
- S. M. Navidi and M. Ehsanian, "A 9-bit Low-Power Fully Differential SAR ADC Using Adaptive Supply and Reference Voltages," Electrical Engineering (ICEE), Iranian Conference on, Mashhad, Iran, 2018, pp. 205-210.
- S. M. Navidi and M. Ehsanian, "A 20 ppm/°C voltage reference cell using a low-power CTAT voltage generator," 2017 IEEE 4th International Conference on Knowledge-Based Engineering and Innovation (KBEI), Tehran, 2017, pp. 0883-0886.